Conventionally, with respect to liquid crystal display devices, an active matrix system having a structure using a thin film transistor (TFT) in a display region constituting picture elements has been employed in many applications including television. In the TFT, generally, amorphous silicon is used as a semiconductor layer and aluminum (Al) or an aluminum alloy (Al alloy) is used as a wiring material. However, as the display is increased in the size and resolution, these materials tend to cause a problem of signal delay due to the properties including field effect mobility and wiring resistance, making it difficult to achieve uniform image display.
For removing the problems, recently, the application of a transparent oxide semiconductor to the semiconductor layer for TFT is studied. For example, a display device using an oxide semiconductor (IGZO) comprising indium (In), gallium (Ga), and zinc (Zn); an oxide semiconductor comprising zinc oxide (ZnO); or an oxide semiconductor comprising a zinc (Zn)-tin (Sn) composite oxide (ZTO), and having field effect mobility higher than that of a conventional display device has been studied and proposed (for example, patent documents 1 to 3). The oxide semiconductor material, however, is generally likely to be dissolved in an acidic or alkaline etching solution used for etching a metal which is a wiring material.
For example, in the case where the IGZO as a semiconductor material and aluminum or an aluminum alloy as a conventional wiring material are used in combination, the IGZO is easily etched by, e.g., an acidic solution and hence, when the IGZO semiconductor layer is in contact with an etching solution used for patterning the wiring material, the IGZO semiconductor layer is damaged, causing a change of the electric properties. For this reason, as shown in FIG. 2, for protecting the channel region between source electrode 6a and drain electrode 6b on IGZO semiconductor layer 9, etching stopper layer 10 is provided to effectively prevent IGZO semiconductor layer 9 from suffering damage.
However, such a so-called etching stopper-type TFT structure has problems in that the formation of an etching stopper layer increases the number of the steps for production, and in that the width of the channel region is limited and thus the degree of freedom for the TFT element design is considerably restricted. Therefore, a channel etching-type TFT structure shown in FIG. 3 is desirable. In addition, the aluminum and aluminum alloy as a wiring material per se have a high resistance, and therefore there is a fear that the properties of an oxide semiconductor, such as IGZO, cannot be satisfactorily utilized.
For solving the above problems, the use of a combination of the oxide semiconductor and a wiring comprised of copper (Cu) or mainly of copper, which is a material having a lower resistance, is studied. Copper has an advantage in that the resistance is low; however, copper poses problems in that when used in a gate wiring, copper has only unsatisfactory adhesion to a substrate, such as glass, and in that when used in a source-drain wiring, copper may diffuse into the underlying semiconductor layer. For preventing these problems, laminating a barrier film of a metal having high adhesion to a substrate, such as glass, and being unlikely to diffuse into a silicon semiconductor film and having barrier properties is studied, and molybdenum (Mo) has attracted attention as the metal.
The laminated film comprising copper or a copper alloy comprised mainly of copper is formed on a substrate, such as glass, by a deposition process, such as a sputtering method, and then subjected to etching process using, e.g., a resist as a mask, forming an electrode pattern. Examples of methods for the etching process include a wet etching method using an etching solution and a dry etching method using an etching gas, such as plasma. The performance required for the etching solution used in the wet etching method is that (i) the oxide semiconductor layer is unlikely to suffer damage, that (ii) the process accuracy is high, that (iii) an etching residue is unlikely to be caused, that (iv) uneven etching is unlikely to occur, that (v) the etching performance is stable despite dissolution of the metal in the wiring material containing copper to be etched (effect of extending the bath life), and that, for dealing with the increase of the display in size and resolution, (vi) the wiring cross-sectional form obtained after the etching is in a predetermined range and the wiring cross-sectional form obtained after the etching is excellent. More specifically, a normal taper form in which the angle between the etched surface at the end of the copper wiring and the underlying substrate shown in FIG. 4 (taper angle) is 30 to 60°, and a distance (CD loss) of 1.2 μm or less, preferably 1 μm or less between the resist end and the wiring end in contact with the barrier film provided under the wiring are required.
As an etching solution used in an etching process for a laminated film comprising copper or a copper alloy comprised mainly of copper, for example, an etching solution comprising at least one selected from among a neutral salt, an inorganic acid and an organic acid, hydrogen peroxide, and a hydrogen peroxide stabilizer (for example, patent document 4), and an etching solution comprising hydrogen peroxide, an organic acid, a phosphate, two types of nitrogen-containing additives, a fluoride compound, and water in predetermined amounts (for example, patent document 5) have been proposed. In addition, an etching solution composition capable of selectively etching a metal film comprising, e.g., Al or an Al alloy from a laminated film comprising an amorphous oxide film and a metal film comprising, e.g., Al or an Al alloy (for example, patent document 6) has been proposed.
However, any of the above-mentioned etching solutions cannot obtain a satisfactory wiring cross-sectional form after the etching, making it difficult to satisfactorily deal with the increase of the display in size and resolution. Further, the etching solution disclosed in patent document 5 comprises a fluoride compound and causes an oxide semiconductor layer, such as an IGZO layer, to suffer serious damage, and further is unsatisfactory from the viewpoint of protecting the environment.